Centrexity

We have the technology

Advanced Instruction Set CPU!



Designed for performance, stability, reliablilty, security at the expense of power. This cpu is intended for high end desktops and servers for high performace. Mobility is not the goal here and will not be considered in this design.

True 64bit lanes, memory, instructions - no 32bit support

Logic if, if bit0-63, if ! bit0-63, if >, if <, if >=, if <=, if ==, if !=

if even, if odd

<= >= where <> goes a differnt path than equals

InRange(min,max)

System Memory

OnCore Memory extra registers kindof - no caches (you/or the compiler) cache what you know is needed

Bitwise operations shift left, shift right

int math inc1, inc2, inc3, dec1, dec2, dec3, add, sub, dividereturnint, dividereturnfloat, mult, multsub1, multadd1, square root

uint math

double math

unsigned double math

Avg, Max, Min
Take the sorting to the hardware level and spend your precious cpu resources else where!

Clock real time millisecond, nanosecond
Having real time clock instructions means much more accurate timing and profiling with very little overhead. An average machine of 2012 takes 100+ns between calls regardless of weather that time has actually passed. Our clock instructions get down to the ns per call!

true random number generator diehard tests capable of 3gbits a second per core
you may be asking who needs that much random data? Well were not sure there may be some people there may not maybe theres something out there that is held up by current limitations and this is key. The reason why you and everyone want this is random data is a nessacity the faster its generated the faster your entropy pool is filled and the faster the cpu can be off doing other more productive things until more random data is needed. Another benifit to having this as a cpu instruction is everything can be done in hardware eliminating the need for a pool and not taking any precious memory bandwith however small it may be!

Encrpytion AES, Montgomery Multiplier, 3DES
Hashing md5, sha2-256, sha2-512, crc
Array/Vector handling
Compression gzip


98% of code is conditions that being the case our cpu is much more heavily condition oriented than others

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